Verification Engineer
Foundry Nine · Semiconductors
Prove the accelerator does what the spec says, before it costs six figures to find out otherwise.
Hardware / FPGA / ASICMid (2–5 yrs)HybridPermanentSponsors visas
Salary band
£60,000 – £78,000
- Location
- Belfast
- Pattern
- Hybrid
- Posted
- 19 Aug 2026 (15d ago)
- Process
- 3 stages, listed below
No account needed. One of us reads it before anything reaches the company.
The work
Tape-out is twice a year and a bug found after it is very expensive. Verification sets the schedule.
Must have
- UVM testbench development
- Coverage-driven verification
- Reading a spec adversarially
Nice to have
- Formal property checking
- RISC-V compliance suites
Interview process
If the client adds a stage after you’ve started, we’ll tell you, and you can withdraw.
- 01
Intro call
30 minTheir questions and yours. No competency framework.
- 02
Technical conversation
60 minWalk through something you built. No live coding.
- 03
Team and offer
45 minMeet the people you would work with, talk numbers.